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2Gb: x16, x32 Mobile LPDDR2 SDRAM S4
Mode Register Definition
Table 26: MR6 Op-Code Bit Definitions
Feature
Revision ID1
Type
Read-only
OP
OP[7:0]
Definition
0000 0000b: Version A
Table 27: MR7 Basic Configuration 3 (MA[7:0] = 07h)
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
Revision ID2
Table 28: MR7 Op-Code Bit Definitions
Feature
Revision ID2
Type
Read-only
OP
OP[7:0]
Definition
0000 0000b: Version A
Note:
1. MR7 is vendor-specific.
Table 29: MR8 Basic Configuration 4 (MA[7:0] = 08h)
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
I/O width
Density
Type
Table 30: MR8 Op-Code Bit Definitions
Feature
Type
Type
Read-only
OP
OP[1:0]
Definition
00b
01b
10b: NVM
11b: Reserved
Density
Read-only
OP[5:2]
0000b: 64Mb
0001b: 128Mb
0010b: 256Mb
0011b: 512Mb
0100b: 1Gb
0101b: 2Gb
0110b: 4Gb
0111b: 8Gb
1000b: 16Gb
1001b: 32Gb
All others: Reserved
I/O width
Read-only
OP[7:6]
00b: x32
01b: x16
10b: x8
11b: not used
PDF: 09005aef83f3f2eb
2gb_mobile_lpddr2_s4_g69a.pdf – Rev. N 3/12 EN
50
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